![]() The propagation delay from side A (non-isolated side) to side B(isolated side) introduced by the isolator circuit is negligible(<50nsec) for both rising and falling edges. The comparator threshold is adjusted to centrebetween the pull down of the isolator circuit and the pull down of theother I2C circuits on the I2C bus on side B. The comparator threshold is set by D3 (to track D2) and the voltagedivider R3/R4 or R6/R7. The pull down from theisolator (as determined by diode D2 and R1 or R2) must be adjusted tobe compatible with the logic low of the devices connected to the bus onside B. If the bus pull up resistors are not 1K, the Vdd voltage is not3.3V or if the driver on the side with the comparator cannot pull below0.2V, the circuit will need to be adjusted. The schottky clamp pulls down to approximately0.5V and the open drain driver pulls to typically 0.1V so thecomparator threshold is well centred between these values. With the component values shown, the comparator threshold isapproximately 0.28V. Diodes D3A,B provide temperaturecompensation to match diodes D2A,B. The threshold of the comparators is set by thevoltage dividers R3,R4 and R6,R7. The voltage levels on Side A are completelycompatible with I2C requirements and there is no special considerationfor the side without the comparator circuit.įor side B, with the comparator circuit, the output of the isolatorshould not turn on the comparator but the open drain driver must turnon the comparator. Note that thecomparator circuit only needs to be used on one side, and could be usedon either side A or side B. If the low on side B is caused by the open drain driver on side B,Q1 and Q2 do turn on and the low is propagated. If the low on side B is caused by low on side A, Q1 or Q2will not turn on due the drop across diodes D2A,B and R1 or R2 and thelow is not propagated back to side A breaking the latch condition. Transistors Q1 and Q2 act as thecomparators. The latchup problem described above is solved by using a comparatorto sense whether the non-isolated side (side A) is causing the low onthe isolated side (side B). C8051Fxxx series MCUs at a bus speed ofapproximately 300KHz including bus transactions which require SCL clockstretching.įigure1: Diodes D1A, B and D2A, b convert the push-pull output of the Si8442to open drain. This circuit has been tested with SiliconLaboratories, Inc. It can be easily adjusted for otherbus pull up resistors. The circuit assumes 1K pull upresistors on the SCL and SDA lines. ![]() Si8442 high speedisolator is show in Figure 1 below. ![]() The full circuit using a Silicon Laboratories, Inc. They tend to be slow due to the slow response of the opto-couplers.Finally, when higher speed digital isolators with standard CMOS inputlevels are used, the circuit tricks using the diode input of theopto-couplers no longer apply. Some of these approaches are sensitive to bus capacitance. Previous attempts to solve this problem have used diodes inherent tothe opto-coupler input and additional circuitry to avoid the latch-upcondition. The open drain problem is easilysolved by putting a Schottky diode in series with the isolator output.However, the latch up problem is much more difficult to solve. This causes isolator B to pull low on side A and the circuit latcheswith both isolators pulling low. If, forexample, the side A driver pulls low then isolator A pulls low on sideB. For the wires that need to be bidirectional, if digital isolatorsare inserted there are several problems the isolators must be opendrain, and there is a latch up condition that can occur.
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